IBIS Macromodel Task Group Meeting date: 07 April 2009 Members (asterisk for those attending): Adge Hawes, IBM Ambrish Varma, Cadence Design Systems * Anders Ekholm, Ericsson * Arpad Muranyi, Mentor Graphics Corp. Barry Katz, SiSoft * Bob Ross, Teraspeed Consulting Group Brad Brim, Sigrity Brad Griffin, Cadence Design Systems Chris McGrath, Synopsys David Banas, Xilinx Donald Telian, consultant Doug White, Cisco Systems * Eckhard Lenski, Nokia-Siemens Networks Essaid Bensoudane, ST Microelectronics * Fangyi Rao, Agilent Ganesh Narayanaswamy, ST Micro Gang Kang, Sigrity Hemant Shah, Cadence Design Systems Ian Dodd, Agilent Jerry Chuang, Xilinx Joe Abler, IBM * John Angulo, Mentor Graphics John Shields, Mentor Graphics Ken Willis, Cadence Design Systems Kumar Keshavan, Sigrity Lance Wang, Cadence Design Systems Luis Boluna, Cisco Systems * Michael Mirmak, Intel Corp. * Mike LaBonte, Cisco Systems Mike Steinberger, SiSoft Mustansir Fanaswalla, Xilinx Patrick O'Halloran, Tiburon Design Automation Paul Fernando, NCSU Pavani Jella, TI * Radek Biernacki, Agilent (EESof) * Randy Wolff, Micron Technology Ray Comeau, Cadence Design Systems Richard Mellitz, Intel Richard Ward, Texas Instruments Sam Chitwood, Sigrity Sanjeev Gupta, Agilent Shangli Wu, Cadence Design Systems Sid Singh, Extreme Networks Stephen Scearce, Cisco Systems * Steve Pytel, Ansoft * Syed Huq, Cisco Systems Syed Sadeghi, ST Micro Ted Mido, Synopsys Terry Jernberg, Cadence Design Systems Todd Westerhoff, SiSoft Vladimir Dmitriev-Zdorov Vikas Gupta, Xilinx Vuk Borich, Agilent * Walter Katz, SiSoft Zhen Mu, Cadence Design Systems * Deepak ???, Ansoft ------------------------------------------------------------------------ Opens: Arpad received email from Samuel Mertens (Ansoft) wondering what is happening on SPICE standardization. -------------------------- Call for patent disclosure: - No one declared a patent. ------------- Review of ARs: - Todd/Michael M.: Ask Synopsys about meaning of "Confidential" - They were being conservative. - The constraint will be relaxed. - We do not have to be concerned. - Todd: Ask Walter if he can be the editor of the IBIS Interconnect SPICE doc - Walter has begun edting. - Todd: Write IBIS s-param BIRD - Still working on it - It may be done in 2 weeks or so - Arpad: Write parameter passing syntax proposal (BIRD draft) for *-AMS models in IBIS that is consistent with the parameter passing syntax of the AMI models - TBD - TBD: Propose a parameter passing syntax for the SPICE - [External ...] also? - TBD - Arpad: Review the documentation (annotation) in the macro libraries. - Deferred until a demand arises or we have nothing else to do ------------- New Discussion: Walter showed the MSWord document received from Synopsys: - Change tracking is enabled in the document - Only Walter, Todd and Michael M have the files so far - Would like to send the edited document to other group members - They should not go on the web site yet - There is enough here to keep us busy for a while - Bob: There is a link reference error highlighted in blue - Walter: It came that way - Arpad: We should designate just a few people to work on this. - Bob: Will there be a confidentiality release? - Walter: Yes - Bob: Hopefully this will be soon - Bob: Maybe only the chopped version should be sent out - Arpad: That could go to the ibis-atm list - The full doc should go to the editors - Walter: MSWord crashed after 30 minutes of deleting dependent sources Arpad showed an email from Samuel Mertens of Ansoft: - Representing the Compact Model Council - "We decided against Berkeley Spice based languages, since they would be hard to define under a formal grammar." - Ansoft is asking to work with us on a language definition - They are considering Spectre and Verilog A languages - Mike L: What are the goals for this effort? - Deepak: This will come out in 2010 - Walter: This will support transistors? - Deepak: Yes - Michael M: This will support BSIM models - IBIS is in the same organization as the Compact Model Council - Arpad: Are there any interconnect elements? - Deepak: No - Radek: It is true that Berkeley Spice does not have a formal language - Bob: Is Cadence donating Spectre? - There has been no discussion with Cadence yet - Arpad: We are focusing on interconnect only, mostly RLC etc. - We may have some controlled sources, but not transistors - Walter: We have active elements in other parts of netlists - EDA vendors may be able to accomodate this? - Michael M: Can CMC be used to describe buffers behaviorally? - Steve: We could ask Samuel to join us for a meeting to go into more depth - Deepak: That sounds good - Bob: Would we have troubles with proprietary tool IP? - Steve: Good question, this relates to the 1735 encryption proposal Arpad: We could discuss the s-param BIRD - Mike L: Todd is not here today Walter: There is a question about how to specify corners in a touchstone file - Michael M: Instead of labeling data as worst case we should list the environment - Walter IBIS AMI has a flexible parameter tree, and could be used for this - Arpad: Another idea is to use Switch Groups - Walter: Channel designers need to have this capability Arpad: Do we want to pursue the CMC initiative? - What companies are involved? - Michael M: It is mostly Si vendors - The CMC URL is http://www.eigroup.org/CMC/ - Walter: There is not much overlap between our groups - How to define params might be one area in common - Arpad: Is CMC mostly buffer oriented? - Steve: Both groups should look at speeding up simulations - We might make IO buffers work better with interconnect - Mike L: Our group was formed to define advanced buffer models - This proposal sounds like a match for that original goal - Arpad: Both proposals are about netlists and we may find commonality - Walter: A year from now we could point to these new models - It might leapfrog IBIS - We need an EMD solution for packages and connectors - Working together might bring us to the 21st century nicely Walter: Send me email if you would like the IISpice documents Next meeting: 14 April 2009 12:00pm PT -----------